Keywords

#cas_latency

CAS latency

Time delay between data read command and availability of data in a computer's RAM

Column address strobe latency, also called CAS latency or CL, is the delay in clock cycles between the READ command and the moment data is available. In asynchronous DRAM, the interval is specified in nanoseconds. In synchronous DRAM, the interval is specified in clock cycles. Because the latency is dependent upon a number of clock ticks instead of absolute time, the actual time for an SDRAM module to respond to a CAS event might vary between uses of the same module if the clock rate differs.

Sat 25th

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CAS latency Memory timings Memory latency Serial presence detect Synchronous dynamic random-access memory CAS DDR4 SDRAM DDR3 SDRAM DDR2 SDRAM Dynamic random-access memory
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